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âThe extra customization in these platforms
improves the chip performance, shrinks the die size and therefore
reduces cost because the silicon area is used more efficiently.
Gartner Dataquest believes these domain-optimized platforms will
accelerate the expansion of FPGAs into new
markets.â
- Serena Hsu, Analyst, Gartner Dataquest
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âVirtex-4 changes the ASIC-FPGA decision
process. With its abundance of embedded cores, control
processors, DSP, clock distribution, high-speed serial I/O, and
memory, Virtex-4 domain-optimized platforms make FPGAs more
efficient in terms of space, cost and power, while keeping the
traditional advantages of time-to-market and flexibility. With mask
costs rising, ASIC and ASSP development is more expensive, making
FPGAs competitive for a broader range of
applications.â
- Allan Armstrong, Program Director, Communications
Semiconductors, RHK, Inc.
"We have seen a continual improvement in our FPGA designs with
the use of ISE 6 design tools from Xilinx. ISE 6 has not only
shortened the time required for us to synthesize and implement our
designs, but also makes very efficient use of internal device
features, and allows for easy portability of projects between our
various working groups."
- Antonio Borrego, FPGA Design Engineer StorageTek
"The Virtex II Pro was an excellent FPGA choice for our hardware
implementation of the Just-In-Time optical (JIT) control plane
protocol, due to the integrated MGTs and dedicated support of
Xilinx field application engineers. With the introduction of the
Virtex-4, MCNC-RDI will have the ability to increase processing
speed and add additional features to the JIT protocol."
- Dan Stevenson Vice President, Advanced Network Research
MCNC-RDI
âXilinx provided us with the opportunity to
participate in the Virtex-4 early access program. As a result, we
are already benefiting from many of the features of these advanced
Platform FPGAs in our next generation products. The Virtex-4's
ChipSync technology made the design of high-speed parallel
interfaces much easier, while achieving the desired performance.
The programmable delay elements, SerDes feature, and regional
clocking inherent to Virtex-4 devices offered critical features
that previously were not available.â
- August Hidalgo, Senior Electrical Engineer, Agilent
Labs
"The combination of Xilinx 6.3i, Virtex-4 and Design Compiler
FPGA is an excellent choice for customers prototyping their complex
standard cell ASIC designs in FPGAs. Devices such as Virtex-4
demand DC FPGA's superior timing quality of results, ability to
deal with ASIC-like design complexity and tight links to Formality
for formal verification. We have worked closely with Xilinx to
develop this solution which is available to our customers
today."
- Gal Hasson, Director of Marketing ASIC and FPGA Synthesis,
Synopsys
"Closer cooperation between FPGA and EDA vendors becomes
critical as high-density, high-speed programmable logic devices
provide viable design alternatives to ASIC implementations. The
Virtex-4 family, with its revolutionary ASMBL architecture, has the
potential to expand the FPGA market into applications way beyond
its traditional use in system prototyping and general logic. Mentor
Graphics supports the new Xilinx devices and ISE 6.3 release with
an advanced FPGA design tool suite that allows designers to take
full advantage of these new reconfigurable platforms."
- Simon Bloch, General Manager Design Creation and Synthesis
Division, Mentor Graphics
"We are very excited about the capability of the new Virtex-4
FPGA family. The combination of high capacity, performance and
potential for lower system cost allows our customers to use FPGAs
in a much broader range of applications than ever before. We have
been working with Xilinx for over a year to integrate our
best-in-class synthesis support for this new family into the 6.3i
version of the Xilinx Integrated Software Environment."
- Jeff Garrison, Director FPGA Marketing, Synplicity
"The role of FPGAs will continue to grow, especially as custom
ASICs become more difficult to justify due to higher up-front
engineering costs. We believe next generation solutions such as
Virtex-4 will be at the forefront of this migration as more
functional-specific FPGAs are created to address certain
application markets for longer product life cycles than in the past
where ASICs were traditionally the logical next step due to ramping
volumes.
- Sean Lavey, Program Manager, IDC Market
Research
"Leveraging the proven success of the Xilinx Virtex series and
the company's one-year lead in 90nm process technology, the
Virtex-4 family is poised to dramatically alter the technical and
business dynamics of the traditional programmable logic market. The
combination of the enhancements brought on by the new Virtex-4
FPGAs and the benefits of a multi-platform approach will accelerate
the shift to FPGAs over ASICs and ASSPs."
- Bob Merritt, Analyst, Semico Research
"The Xilinx ASMBL architecture is novel in that it enables a
choice of platforms with an optimized feature mix. This is a
compelling product differentiation, especially for DSP designers
looking to use an FPGA as an accelerator for their DSP processor in
very high performance applications."
- Will Strauss, president of Forward Concepts
"The new Virtex-4 FPGA family, along with its underlying ASMBL
architecture, represent a technology breakthrough that shifts the
cost models and role of FPGAs in systems design," said "For
the first time, designers can choose an FPGA platform with the
right mix of capabilities for their specific design."
- Gerald S. (Jerry) Worchel Principal Analyst, Digital
Engines Service, In-Stat/MDR
"This enhanced platform approach incorporates advanced system
features that are particularly useful in a wide-range of embedded
applications that require high-performance processing and
high-bandwidth I/O. Particularly for applications that are
dominated by control flow operations involving complex data types,
the Virtex-4 FX full-featured platform is an ideal solution.
"
- Jerry Krasner, Ph.D., VP, Embedded Market
Forecasters
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