|
|
|
Home
: Company
Info & Press : Press
Room : Press
Releases : Xilinx Press Release #0434
Xilinx Press Release #0434
FOR IMMEDIATE RELEASE
Xilinx Introduces Second-Generation CPLD
Design Kit
Pioneer of low power, low cost CPLDs extends
leadership by offering industry’s most comprehensive design
environment at half the cost of competing kits
SAN DIEGO, Calif. – March 8, 2004 – At the Wireless
Systems Conference today, Xilinx, Inc. (NASDAQ:XLNX) announced the
immediate availability of its second-generation CPLD Design Kit, a
complete solution for developing a broad range of industrial, data
processing, communications, and consumer electronics applications.
Based on both the CoolRunner-II™ and XC9500XL™ product
families, the $49.99 kit provides all elements needed to develop,
debug and complete a design, including software, cabling, training
material, and prototype board with pre-programmed CPLDS. Visit
Xilinx booth #423 at the Wireless Systems Conference in San Diego,
Calif. March 8 – 10 for a live demonstration.
This is the second generation CPLD Design Kit from Xilinx and
further extends the company’s technology leadership in the
CPLD market. As the leader in programmable logic, Xilinx
aggressively stepped up its presence in the highly competitive CPLD
market segment this year, with product sales increasing nearly 30
percent year over year in the December quarter.
"Our second-generation CPLD Design Kit significantly reduces a
designer’s time from initial concept to final design," said
Mark Halfman, director of marketing and applications for the CPLD
division at Xilinx."By combining our two primary technologies in
one complete kit for under $50, Xilinx enables the creation of
next-generation systems faster and with lower risk than any other
solution available."
About CoolRunner-II RealDigital CPLDs
Xilinx CoolRunner-II RealDigital CPLDs provide the high
performance and low cost advantages of a programmable device
without the typical price premium normally associated with low
power devices. Available in densities ranging from 32 to 512
macrocells, the CoolRunner-II family achieves performance as up to
385 MHz and pin-to-pin delays as fast as 3.0ns while providing a
standby current as low as 12 microamps (<12muA) - an industry
first.
Pricing and Availability
Priced at just $49.99 USD, the CPLD Design Kit is immediately
available through authorized Xilinx distributors or direct from the
Xilinx online store. For more information visit www.xilinx.com/cpld/kit.
-30-
#0434
|
|